卷积Turbo码编码器及CPLD实现

卷积Turbo码编码器及CPLD实现 Parallel Concatenated Convolutional Encoder and Its Realization on CPLD 江森 JIANG Sen 1 first-author 苏祥芳 SU Xiang fang 1 肖东亮 XIAO Dong liang 1 孙洪 SUN Hong 1 武汉大学电子信息学院,湖北,武汉,430072 武汉大学电子信息学院,湖北,武汉,430072 School of Electronic Information,Wuhan University School of Electronic Information,Wuhan University 详细探讨了卷积 Turbo码编码器实现过程中的关键问题 ,结合 CCSDS及 IMT- 2 0 0 0国际通信标准给出了具体解决方案 .使用 Maxplus2开发工具在 CPL D上实现了整个卷积 Turbo码编码器并给出了系统分析 ,实验结果表明了该编码器的正确性和合理性 At first, the fundamental of Turbo codes is introduced.Because of their excellent performance and practical application, parallel cancatenated convolutionary codes, a branch of Turbo codes, are focused on. Then some key problems on realizing the hardware encoder of parallel concatenated convolutionary codes are analysed in details, which includes the problem of flush bits, the problem of stream processing, the problem of realizing interleaver and the problem of puncturing. To the four problems, we bring forward the concrete resolutions ,which can be realized on hardware easily, especially on CPLD.Moreover parts of the resolutions are compliant with the relative international standards and recommendations.Refering to Telemetry Channel Coding Recommendation for Space System of CCSDS, a simplized interleaver design is developed and for adapting to all kinds of puncture patterns of IMT\|2000 and CCSDS, a flexible puncture method is adopted. Based on these methods, an integrated encoder system is presented and analysed, some parameters of the system are formulated.According to the system, two kinds of encoders are designed and simulated on FLEX10K, a series of CPLD, with Maxplus2, a powerful CPLD development software.Compared with the results of standard C program of encoding parallel concatenated convolutionary codes, the results of simulation prove the designs are correct.Seen from the experimental data listed at the end, the resolutions are efficient on reducing consumation of hardware resource. 并行级联卷积码 Turbo码 编码器 复杂可编程逻辑器件 parallel concatenated convolutionary codes Turbo codes encoder CPLD（Complex programmable logic device） TN76 国家自然科学基金资助项目 （ 60 0 72 0 41） 2001-03-01 2021-04-01 3