抗功耗攻击的密码运算部件辅助设计技术

抗功耗攻击的密码运算部件辅助设计技术 Aided Design Methods for Power Analysis Resistant Implementation of Cryptographic Device 童元满 TONG Yuanman 1 2 first-author 王志英 WANG Zhiying 1 2 戴葵 DAI Kui 1 2 陆洪毅 LU Hongyi 1 2 国防科学技术大学计算机学院 国防科学技术大学计算机学院 School of Computer Science,National University of Defense Technology School of Computer Science,National University of Defense Technology 国防科学技术大学计算机学院,湖南,长沙,410073 国防科学技术大学计算机学院,湖南,长沙,410073 在识别密码算法部件中可被功耗攻击的漏洞的基础上,提出了量化评估密码算法部件防护能力的计算方法,该方法可指导设计者在设计过程中验证和改进密码算法的具体实现.本文以成功实施功耗攻击所需的样本数来衡量密码算法部件的防护能力,统一定义了各种不同强度的功耗攻击的信噪比,提出了估算瞬态功耗概率分布的算法,以及估算所需样本数的计算方法.结合识别功耗攻击漏洞和防护能力的量化评估,设计实现了抗功耗攻击的DES算法部件,实验结果验证了所提出的辅助设计技术的有效性. According to the identified vulnerabilities to power analysis attacks in the implementation of cryptographic device,method of quantitative evaluation of the resistibility to power analysis is proposed.So it is feasible to validate and improve the practical design during the design process.The number of power samples required to perform an attack successfully is used to measure the resistibility to power analysis.The unified definition of signal noise ratio of different power analysis attacks is proposed.To compute the signal noise ratio,the algorithm to evaluate the probability distribution of transient power consumption is presented.Based on the signal noise ratio,the number of power samples required is evaluated.Combined with the identification of vulnerabilities and quantitative evaluation,a DES coprocessor is implemented.The experiment result shows that the proposed aided design method is truly practicable. 功耗攻击 密码算法 量化分析 信噪比 数据加密算法 power analysis attack cryptographic algorithm quantitative analysis signal-noise ratio DES（data encryption standard） TN918 国家自然科学基金资助项目（60706026） 2008-03-01 2021-04-01 3